Hardware dossier · Investigated 11 Jul 2026 · Sources: NVIDIA, SemiAnalysis, ServeTheHome, X/Twitter sweep

The Kyber Midplane

NVIDIA's bet that one enormous copper circuit board can replace two miles of cabling — the vertically-bladed, fully liquid-cooled rack behind Rubin Ultra, and the manufacturing fight over whether it ships in 2027 or at all in its current form.

144
GPU packages / rack
~87,000
est. NVLink contacts
~78
claimed PCB layers
~600 kW
2025 design point
800 VDC
power delivery
Facet 01 — What Kyber is

From cable jungle to printed spine

Plain English

AI supercomputers are built as refrigerator-sized cabinets ("racks") packed with GPU chips. The chips inside one rack must talk to each other constantly, at absurd speed. Today NVIDIA wires them together with about 5,000 individual copper cables per rack — over two miles of wire.

Kyber is NVIDIA's next design: throw away the cables and plug all the computers into one giant printed circuit board — the midplane — like game cartridges into a huge console. It packs twice as many GPUs into one rack. The catch: that board may be the hardest circuit board anyone has ever tried to mass-produce, and in July 2026 a fight broke out over whether it can ship on time.

Every NVLink rack NVIDIA ships today — GB200, GB300, and the Vera Rubin NVL72 arriving in 2H 2026 — uses the Oberon MGX design: horizontal compute trays wired to NVLink switch trays through four pre-built cable cartridges. Kyber rotates compute 90° into vertical blades — "books on a shelf" — and mates them to rear-mounted NVLink switch blades through one huge passive copper PCB midplane. It's designed for Rubin Ultra (officially 2027), doubling the single-rack copper NVLink domain from 72 to 144 GPU packages.

OBERON (today) Horizontal trays · ~5,000 cables · 72 GPU packages KYBER (next) MIDPLANE PCB Vertical blades · zero rack-scale cables · 144 GPU packages
The generational shift: Oberon connects horizontal trays through cartridges of copper cables (orange tangle). Kyber plugs vertical compute blades (left, grey) and NVLink switch blades (right) into opposite faces of one printed circuit board.
Lineage
GenerationWhenRackScale-up domain
GB200 / GB300 NVL722024–25Oberon — trays + cable cartridges72 packages
Vera Rubin NVL722H 2026Updated Oberon (renamed from "NVL144")72 packages
Rubin Ultra — multirack NVL5762026–278 × Oberon racks, copper in-rack + optics between576 packages
Rubin Ultra — Kyber NVL1442027 contestedKyber — vertical blades + PCB midplane144 packages
Feynman-era NVL11522028+8 × Kyber racks joined optically1,152 packages

The whole architecture is a wager on copper: NVIDIA keeps the highest-bandwidth scale-up domain electrical for as long as physics allows, deferring in-rack optics to the Feynman era. The midplane is where that wager gets physically hard.

Facet 02 — Mechanical architecture

Inside the rack — click any component

Plain English

Think of the rack as a bookshelf. The "books" are compute blades — each one a complete slab of computer with GPUs, CPUs, and its own water-cooling plumbing. You slide a book in, and connectors on its spine snap into the big board in the middle. Behind that board sit the "switches" — the traffic routers that let any GPU talk to any other. A second cabinet next door (the "sidecar") holds the power converters and cooling gear, so the main cabinet is almost pure computer.

KYBER COMPUTE RACK COMPUTE BLADES ×36 PCB MIDPLANE NVLINK SWITCH POWER + COOLING SIDECAR · 800 VDC
Select a component

Kyber rack, exploded

The 2026 GTC prototype shows two chassis of 18 vertical compute sleds (36 total), rear NVLink switch blades, and a hatched copper midplane between them. A rack-sized sidecar carries power conversion and cooling — roughly a two-rack floor footprint per compute rack. Click the blades, midplane, switches, sidecar, or coolant lines.

Blade mating sequence
  1. Align blade with chassis guides, slide vertically into position.
  2. Cam/retention mechanism seats the high-density connectors — angular mismatch across four large connector groups can damage contacts.
  3. Blind-mate liquid and electrical interfaces engage.
  4. Four upper NVLink connector groups engage the midplane; rear switch blades engage the opposite face.
Facet 03 — The board itself

One board instead of 5,000 cables

Plain English

A circuit board is copper wiring printed onto layers of fiberglass, like a many-storey road map. Your laptop's board has maybe 10 layers and is smaller than this page. The Kyber midplane is reportedly about a square metre with ~78 layers — a skyscraper of printed wiring — made from exotic materials so signals don't fade. Printing it perfectly is the problem: one bad via out of tens of thousands and the whole expensive board is scrap. That yield question is the heart of the entire controversy.

The midplane is a passive, densely routed copper PCB spanning nearly the rack's full cross-section. Compute blades plug into front-facing connectors; NVLink switch blades plug into rear-facing ones; traces route through the board between the two populations. NVIDIA calls it a "cable-free midplane" — analysts also call it an orthogonal backplane.

THE WIRING PROBLEM, BY THE NUMBERS Oberon rack cables ≈ 5,000 cables · 2+ miles of copper Kyber if cabled (est.) > 20,000 connections — impractical Kyber midplane 1 board · ~87,000 printed contacts Claimed construction 3 × 26-layer sections bonded = ~78 layers · trace/space ≤ 25 µm M9 CCL + quartz fabric + PTFE (analyst claims)
Cable counts are NVIDIA figures for Oberon; the >20,000-connection cabled-Kyber estimate and the 78-layer construction are analyst/supply-chain reporting, not confirmed by NVIDIA.
Why it wins
  • Shorter, repeatable, lithographically-precise electrical paths
  • No manual routing of thousands of individually terminated cables
  • Higher blade density — no cable bulk in the airflow-free chassis
  • Automated fabrication and validation; faster assembly
  • Blades become clean field-replaceable units
Why it's brutal
  • ~1 m² board, claimed ~78 layers (three bonded 26-layer sections)
  • Hybrid exotic materials: M9-grade CCL + quartz fabric + PTFE (analyst claims)
  • Trace/space ≤ 25 µm, impedance tolerance near 5% for 448G-class signaling
  • One small defect can scrap an extremely expensive board
  • Enormous failure blast radius: a passive fault touches many links
Counted from photographs
ObservationValueSource
Compute-blade columns per midplane section18ServeTheHome, GTC 2025
Connector rows per blade4ServeTheHome
Visible contacts per connector housing~152G. Lockwood photo analysis
Est. NVLink contacts, full 2025 rack>87,000G. Lockwood (image-derived, not official)
Connector housings per switch blade6G. Lockwood
Cabled equivalent, per analyst estimate>20,000 connectionsTom's Hardware / supply-chain reporting

Connector topology visibly changed between the 2025 and 2026 prototypes — none of these are frozen production values. SemiAnalysis noted at GTC 2026 that the connectors differ from Amphenol Paladin HD2.

Liquid cooling is the enabler: a traditional blade midplane must be perforated for airflow, sacrificing routing area. Kyber is fanless and 100% liquid-cooled, so the board can occupy nearly the entire cross-section — that's what makes the density possible at all.

Facet 04 — Why copper is running out of room

8.9 picoseconds per bit

Plain English

The GPUs shout data at each other so fast that each "bit" of information occupies a sliver of time almost too small to imagine — trillionths of a second. At that speed, copper wire behaves less like a wire and more like a bad phone line: signals blur, echo, and leak into their neighbors. Every plug, every extra centimetre, every manufacturing wobble eats into the tiny margin. Kyber's answer: stop hand-wiring and print the wiring instead, so every path is identical and machine-perfect. But that just moves the difficulty from assembly into the printing press.

At 224 Gb/s PAM4 the unit interval is ~8.9 ps; at the prospective 448 Gb/s it halves to ~4.5 ps. In that regime everything eats the link budget: dielectric loss, copper roughness, via stubs, connector discontinuities, skew, crosstalk, impedance ripple. Every detachable cable connector adds insertion loss and reflections.

THE SHRINKING WINDOW — TIME PER BIT (UNIT INTERVAL) 112G (GB200 era) 17.9 picoseconds 224G (Rubin era) 8.9 ps 448G (Kyber target) 4.5 ps For scale: light itself travels just ~1.3 mm in 4.5 ps. Any imperfection in the copper path smears one bit into the next.
Each doubling of speed halves the time slot per symbol. At 448G-class rates, the margin for manufacturing variation collapses — the argument for lithographic PCB precision over hand-routed cables.
The trade Kyber makes

A cable is flexible but its path length, bends, and terminations vary piece-to-piece. A rigid PCB trades cable-management complexity for lithographic precision: deterministic geometry, matched skew across thousands of differential pairs, controlled launches. It does not make the SI problem disappear — it moves it into manufacturing: trace geometry, dielectric constant uniformity, layer registration, back-drilling, board flatness under mechanical strain, all at ~1 m² scale.

ApproachSI characterManufacturing characterStatus
Oberon cable cartridgesPer-cable variation, proven at 224G-classMature, labor-heavy, ops-provenshipping
Kyber PCB midplaneDeterministic, tight tolerance, 448G-aimedExtreme: yield, layers, hybrid materialscontested
NVL72×2 back-to-back copperLonger copper reach, "odd design"cancelled (per SA; hyperscaler ops pushback)
Co-packaged optics NVSwitchEscapes copper limitsYield/packaging unproven at volumeFeynman-era (per SA)

The weak-form consensus across bulls and bears on X: system manufacturability, not GPU silicon, is now the gating item for scale-up domain growth.

Facet 05 — Counting conventions

The NVL numbers game: 576 → 144 → 576

Plain English

Each "GPU" NVIDIA sells is actually a package containing several chips glued together — like a chocolate bar made of squares. In 2025, NVIDIA marketed Kyber by counting the squares (576). In 2026 it went back to counting the bars (144). Nothing physical changed — only the marketing arithmetic. So when you see "NVL576" in a headline, check the date: it means one futuristic rack in 2025 coverage, but eight of today's racks in 2026 coverage.

"NVL576" has meant two different things in eighteen months. In 2025 NVIDIA counted dies; in 2026 it went back to counting packages. Any Kyber spec you read must carry a date.

HOW BIG IS ONE "BRAIN"? — NVLINK SCALE-UP DOMAINS (GPU PACKAGES) NVL72 · 1 Oberon rack 72 NVL144 · 1 Kyber rack 144 — the midplane's job NVL576 · 8 Oberon racks 576 (copper in-rack + optics between) NVL1152 · 8 Kyber racks 1,152 (Feynman-era ambition) Bigger domains matter because every GPU in a domain can share memory traffic at full NVLink speed — one giant brain vs several smaller ones.
Official 2026 counting convention (packages, not dies). The Kyber midplane is what doubles the single-rack domain from 72 to 144.
GTC 2025 convention

144 × 4 = 576

One Kyber rack = 144 four-die Rubin Ultra packages, marketed by counting the 576 dies. Broke the convention that a multi-die B200 counts as one GPU.

GTC 2026 convention

144 = NVL144

One Kyber rack = NVL144 (packages). Official NVL576 = 8 Oberon racks; future NVL1152 = 8 Kyber racks joined optically. NVIDIA's "Polyphe" prototype exercises the multirack topology on GB200 hardware.

July 2026 wildcard

SemiAnalysis reports the four-die Rubin Ultra package was cancelled in favor of a two-die design (~half the per-package performance). Unconfirmed by NVIDIA — but if true, every 2025 NVL576 comparison needs recalculating, and the die-count marketing collapses entirely.

Dimensions and weight — what's actually known

NVIDIA has published no production Kyber height, floor-loading, or weight. The ~4,000 lb figure circulating online belongs to the Vera Rubin NVL72 Oberon rack, not Kyber; the 6,000–8,000 lb Kyber claims are unsubstantiated. The 2025 prototype needed a rack-sized power/cooling sidecar — call it a two-rack footprint.

Facet 06 — Power delivery

800 VDC, or drowning in busbar

Plain English

Power = voltage × current. Push the same power at low voltage and you need enormous current — which needs enormous copper bars, like needing a fire hose instead of a garden hose. A Kyber rack drinks roughly the power of 500 homes. At today's 54 volts that would mean ~11,000 amps and hundreds of kilos of copper bar; at 800 volts it's a manageable ~750 amps. That's why NVIDIA is pushing the whole industry — power companies, converter makers, data-center builders — to rewire around 800-volt DC. Try the slider below.

Today's MGX racks distribute ~54 VDC from up to eight in-rack power shelves. NVIDIA's math: scaled toward a megawatt, that consumes up to 64U of power shelves and 200 kg of copper busbar, leaving no room for compute. Kyber-class racks move conversion into an 800 VDC sidecar/power rack.

Interactive — current draw vs distribution voltage
Bus current required
750 A
≈15× less current than 54 V at the same power — smaller conductors, lower I²R loss, no 200 kg busbar.
RACK APPETITE — POWER PER RACK GB200 NVL72 (2024) ~120 kW Kyber concept (2025) ~600 kW — 5× in one generation Industry trajectory megawatt-class racks before 2030 (projection) 600 kW is a 2025 design-point claim; the current Kyber NVL144's final power draw is unpublished.
What the sidecar absorbs

Centralized rectifiers, DC busways, rack-level DC/DC conversion, ride-through storage, arc-flash protection, DC-rated disconnects. Space freed in the compute rack, complexity moved into the facility — this is a data-center redesign, not a server upgrade.

Ecosystem locked in

20+ partners: Infineon, TI, ST, onsemi, Navitas (silicon); Delta, Flex, LiteOn (components); ABB, Eaton, Siemens, Schneider, Vertiv (2H 2026 800 VDC portfolio); Foxconn's 40 MW 800 VDC-ready Kaohsiung-1. Per Morgan Stanley (Jul 10, 2026): 800 V remains on schedule even if the Kyber form factor changes.

Facet 07 — Thermals

Fanless, 100% liquid

Plain English

A 600 kW rack gives off as much heat as a few hundred space heaters running at once — no amount of fans can blow that away. So Kyber has no fans at all. Instead, warm water flows through metal plates bolted directly onto every hot chip, carries the heat out to the sidecar, and returns cooled. Removing fans is also what frees the big board to fill the whole cabinet — no holes needed for airflow. The flip side: if the water stops, everything stops.

Kyber removes every fan. Direct-to-chip liquid cooling covers GPUs, CPUs, NICs, optics, and supporting electronics — components that stayed air-cooled in GB200/GB300 get cold plates. NVIDIA advertises 45 °C warm-water cooling and even liquid-cooled busbars for the Rubin MGX ecosystem.

FACILITY WATER CDU / HEAT EXCHANGER SIDECAR MANIFOLD COMPUTE BLADE GPU COLD PLATES CPU · NIC · OPTICS BLIND-MATE QDs 45°C HEATED RETURN → CDU → FACILITY LOOP
Direct-to-chip loop: warm (~45 °C) water is enough because it only needs to be colder than the silicon, not cold — which slashes chiller energy. Blind-mate quick-disconnects (QDs) let a blade be pulled without spilling coolant.
Why fanless matters
  • Fan power budget goes back to compute
  • Midplane needs no airflow perforations — the key unlock for board area
  • Blades pack far more densely
The skeptics' physics

Vertical blades create a top-vs-bottom thermal gradient; the densest mid-board region runs hottest (SP Lee, Jul 8 2026 on X). Coolant becomes a hard dependency — leak detection, QD reliability, flow balancing, and service isolation are now rack-critical. No Kyber-specific flow/pressure/water-quality specs have been published.

Facet 08 — The manufacturability fight

Six days in July 2026

Plain English

On July 5, a respected research firm reported that the giant board can't yet be manufactured reliably and the whole rack slips a year, to 2028. Stocks of the board's Asian suppliers dropped double digits. NVIDIA responded with a carefully-worded "our roadmap is intact" — notably not "the report is wrong." Five days later Morgan Stanley relayed the real story: the chips still ship on time, but the rack design itself is being replaced with a "better solution." Translation: the report was probably right about the board being too hard — and NVIDIA had already changed course.

The midplane went from GTC showpiece to the most contested board in the industry in under a week. Amber dots mark contested claims.

MAR 18 2025

GTC 2025 — Kyber unveiled

Jensen shows "Rubin Ultra NVL576": one Kyber rack, 144 quad-die packages, ~600 kW, 2H27. Spec excitement dominates X (Ian Cutress, Beth Kindig).

OCT 2025

OCP contribution + 800 VDC ecosystem

NVIDIA announces Vera Rubin MGX open contributions, 20+ power partners, Foxconn/Vertiv commitments. Editor's note quietly renames VR "NVL144" → NVL72.

MAR 2026

GTC 2026 — naming reset, blade demo

One Kyber rack is now NVL144; NVL576 = 8 Oberon racks; NVL1152 = 8 Kyber racks. Jensen demos the compute blade and its four NVLink connectors seating into the midplane. SemiAnalysis inspects connectors — not Amphenol Paladin HD2.

JUL 5 2026

SemiAnalysis: "MASSIVE DELAY"

~2.3M-view thread: Kyber NVL144 slips >12 months to 2028 on PCB-midplane manufacturability; NVL72×2 back-to-back cancelled after hyperscaler ops pushback; 4-die Rubin Ultra cut to 2-die; volume offsets to more Oberon racks. Asia PCB suppliers sell off (Kingboard −18%, Ibiden −10%).

JUL 6 2026

The materials thread

@tphuang details a ~78-layer hybrid M9 CCL + quartz-fabric + PTFE stack; drill-bit export controls compound fab pain. @kl0nkku counters: ~1 m², ~87k pins is brutal but normal pre-production yield tuning, not collapse.

JUL 6–9 2026

NVIDIA: "roadmap intact"

IR line via Citi: NVLink domains shown at Computex unchanged; CPO scale-out in production; from Feynman (CY2028) customers pick NVLink CPO or copper. Notably not a point-by-point denial of the midplane delay.

JUL 10 2026

Morgan Stanley: "a better solution"

Per MS (via @JulienTechInvst): Rubin Ultra ships next year, but the Kyber form factor is replaced by a "better solution" possibly supporting a larger single-rack domain; 800 V and optical inter-rack scale-up remain on schedule. The debate pivots from "is it delayed?" to "what form factor actually ships?"

SemiAnalysis case

The board is the bottleneck

Midplane yield gates the rack. No proven copper path beyond NVL72-class until Feynman-era CPO NVSwitch → opens a scale-up window for AMD MI500X and TPUv8-class systems. Fallback: sell more Oberon.

Company / MS reconciliation

Form factor churn ≠ product slip

Rubin Ultra the product still ships 2027; the original Kyber design-of-record evolves into something claimed to be better; 800 VDC and optics stay on track. Careful readers score it: SA right on manufacturability stress, wrong if you equated "Kyber rack" with "Rubin Ultra year."

Facet 09 — X / analyst pulse (via Grok sweep, Jul 11 2026)

Who's saying what

Plain English

Reading the room: one research firm (SemiAnalysis) drove the whole story; Wall Street banks then interpreted it; NVIDIA said little. Retail investors called it fake news, engineers mostly said "the board really is that hard," and by July 10 the argument settled into "the design is changing, the schedule maybe isn't." Notably absent: any actual NVIDIA engineer or big-cloud insider speaking publicly.

VoiceDateClaimRead
@SemiAnalysis_Jul 5Kyber → 2028; NVL72×2 cancelled; 4-die → 2-die; Oberon offsetbear catalyst
@tphuangJul 678-layer M9 + quartz + PTFE hybrid; drill-bit geopoliticsmaterials detail
@JulienTechInvst (SA)Jul 6–10Backplanes 100% copper; delay offsets to Oberon; relays MS "better solution"reconciler
@kl0nkkuJul 8~1 m² / ~87k pins = hard, not apocalyptic; keeps 2027yield-curve calm
@id21sp (SP Lee)Jul 8Vertical blade density vs coolant gradient physicsthermal skeptic
NVIDIA IR (via Citi/Tae Kim)Jul 8"Roadmap fully intact"; Computex NVLink domains unchangednon-denial
Morgan Stanley (via Julien)Jul 10Kyber form factor replaced by "better solution"; Ultra ships next year; 800 V on schedulepivot point
UBSJul 9Orthogonal-backplane slip "within expectations"; watch PTFE–M9 commercializationsell-side shrug
@KawzInvestsJun 7~600 kW forces 800 V sidecar; power-semi content/rack ~$20k → ~$123k classpower BOM thesis
@TheValueistNov 2025Full Kyber/NVL576 BoM map; 800 V + NVLink saturation unproven in public tracesBoM deep dive
Jensen (via @wallstengine)Mar 2026"Do both": Oberon copper NVL72 + optical to 576; Kyber → NVLink 144canonical framing
Sentiment arc

Mar 2025–Mar 2026: spec excitement. Jul 5–7: panic, supplier selloff, "FUD" accusations from retail bulls. Jul 8–10: IR cleanup + MS reframe — debate stabilizes around form factor, not roadmap death.

The one thing every camp agrees on: rack-level manufacturability is the new bottleneck. GPU silicon no longer gates the roadmap; boards, power, and cooling do.

Caveats from the sweep: no substantive first-party posts from NVIDIA engineers or named hyperscaler leads — pushback flows through SemiAnalysis. Layer/pin/$27k-PCB figures are analyst numbers, not NVIDIA datasheets. Retail shorthand still conflates Kyber NVL144 with multirack NVL576.

Facet 10 — What nobody knows yet

Open questions

Plain English

The short version: can the board be printed reliably, does it ship in 2027 or 2028 (and in what shape), and can any existing building even host a rack this hungry? Nobody outside NVIDIA can answer these today.

1 · Is the board manufacturable at production yield?

The central question. Claimed 78 layers, hybrid exotic dielectrics, ≤25 µm geometry, ~5% impedance tolerance, on a ~1 m² panel — one defect scraps the board. NVIDIA has confirmed none of these figures.

2 · 2027 or 2028 — and in what form?

SA says 2028. NVIDIA says "roadmap intact" without reaffirming Kyber NVL144 volume in 2027. MS says the form factor is being replaced by a "better solution." Unresolved as of Jul 11, 2026.

3 · Is the four-die Rubin Ultra package dead?

Unconfirmed. A move to two dies halves per-package compute and invalidates every 2025 NVL576 comparison.

4 · Is direct optical NVLink volume-ready?

NVL576/NVL1152 depend on rack-to-rack optics. Polyphe demonstrates topology, not volume yield, field reliability, power-per-link, or cost. SA argues mature CPO NVSwitch waits for Feynman.

5 · What's the midplane service model?

Unpublished: connector mating-cycle ratings, failed-lane diagnosis, whether the midplane is field-replaceable at all, degraded-operation behavior, replacement fixtures. Oberon has published maintenance-mode semantics; Kyber doesn't yet.

6 · Can existing facilities take it?

~600 kW + sidecar stresses floor loading, coolant capacity, CDU redundancy, DC arc safety, busways, freight elevators. 800 VDC is a facility redesign.

7 · Does the density actually pay?

Fewer racks ≠ cheaper. Sidecar footprint, board yield cost, optics cost, downtime blast radius, stranded power during partial failure, and collective efficiency all enter the equation.

Bottom line

Kyber's strength and risk are the same fact: it concentrates an extraordinary number of 448G-class copper links into one enormous passive PCB and its connector system. If that board can be built at yield, 144-package copper racks become practical. If not, NVIDIA sells more Oberon, accepts multirack topologies — or the "better solution" Morgan Stanley hints at is already the answer.